When inputting AES/EBU data, the CRC byte and parity bit will be recalculated and
inserted automatically.
3.1.6 Control Code Input
When inputting non-AES/EBU audio data, the validity (V), user data (U) and channel
status (C) bits of each audio data channel must be input to the corresponding pins (VFLA,
VFLB; UDA, UDB; CSA, CSB). The signals must be updated on the rising edge of
WCINA/B and remain constant for the entire word clock period (64 ACLK cycles).
When inputting non-AES/EBU audio data, the SAFA and SAFB pins must be high for one
frame out of 192 frames received to indicate the start of frame condition.
When inputting AES/EBU audio data, the control code input pins should be grounded as
they are not used.
Table 3-2: Audio Input Formats
FORMATS
AIN-MODE 0
AIN-MODE 1
AIN-MODE 2
AIN-MODE 3
AIN-AES/EBU
Not Used
Not Used
Not Used
WCINA/B
User Supplied
User Supplied
User Supplied
User Supplied
Not Used
–
–
–
AM[2]
0
0
0
0
1
1
1
1
AM[1]
0
0
1
1
0
0
1
1
AM[0]
0
1
0
1
0
1
0
1
GS9023B GENLINX® II GS9023B Embedded Audio
CODEC
Data Sheet
37954 - 2
December 2009
18 of 56
Proprietary & Confidential