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Micrel, Inc.
Clock
Clock
Serial Input
Data
E445a
SIN
SOUT
SIN
SOUT
Q3 Q2 Q1 Q0
E445b
SIN
SIN
Q3 Q2 Q1 Q0
Q7 Q6 Q5 Q4
Q3 Q2 Q1 Q0
Parallel Output Data
Clock a
Clock b
Tpd CLK
to SOUT
667ps
(1.5GHz)
100ps
800ps
1050ps
Figure 4. Extended Frequency 1:8 Demultiplexer
SY10E445
SY100E445
CLK
SINa
Q0
Q1
Q2
Q3
Q4 (Q0 a)
Q5 (Q1 a)
Q6 (Q2 a)
Q7 (Q3 a)
SOUTa
SOUTb
CL/4a
CL/4b
CL/8a
CL/8b
Dn–4
Dn–3
Dn–2
Dn–1
Dn
Dn+1
Dn+2
Dn+3
Dn+4
Dn–4
Dn–3 Dn–2
Dn–1
Dn–4
Dn
Dn–3
Dn+1
Dn–2
Dn–4
Dn–3
Dn–2
Dn–1
Dn
Dn+1
Dn+2
Dn+3
Dn+2
Dn+3
Dn–1
Dn
Dn+1
Timing Diagram
M9999-032206
hbwhelp@micrel.com oPr (R40O8) D95U5-1C6T90 ORDERING CODE
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