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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

FM24C32 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FM24C32 Datasheet PDF : 13 Pages
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Write Cycle Timing
SCL
SDA
8th BIT
ACK
Note:
WORD n
STOP
CONDITION
tWR
START
CONDITION
The write cycle time (tWR) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.
Typical System Configuration
VCC
VCC
SDA
SCL
Master
Transmitter/
Receiver
Slave
Receiver
Slave
Transmitter/
Receiver
Master
Transmitter
Master
Transmitter/
Receiver
Note: Due to open drain configuration of SDA and SCL, a bus-level pull-up resistor is called for, (typical value = 4.7k)
FM24C32U Rev. A.1
6
www.fairchildsemi.com

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