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AN-6921

Integrated Critical Mode PFC / Quasi-Resonant Current Mode PWM Controller FAN6921

Fairchild Semiconductor 

AN-6921

APPLICATION NOTE

Lab Note

Before modifying or soldering/desoldering the power

supply, discharge the primary capacitors through the

external bleeding resistor. Otherwise, the PWM IC may be

damaged by external high-voltage.

This device is sensitive to electrostatic discharge (ESD). To

improve the production yield, the production line should be

ESD protected as required by ANSI ESD S1.1, ESD S1.4,

ESD S7.1, ESD STM 12.1, and EOS/ESD S6.1 standards.

Printed Circuit Board Layout

Printed circuit board layout and design are very important

for switching power supplies where the voltage and current

change with high dv/dt and di/dt. Good PCB layout

minimizes EMI and prevents the power supply from being

disrupted during surge/ESD tests.

Guidelines

IC Side:

ƒ Reference ground of the COMP, INV, CSPFC, and

CSPWM pins are connected together and then

connect to IC’s GND directly.

ƒ Reference ground of VIN, RT, FB, and DET pins

are connected to IC’s GND directly.

ƒ Small capacitors around IC should be connected to

IC directly.

ƒ The trace line of CSPFC, CSPWM, OPFC, and

OPWM should not be paralleled and should be close

to each other to avoid introducing noise.

ƒ Connections of IC’s GND, CBulk’s ground, and

auxiliary winding of PWM XFMR:

Approach 1: Auxiliary winding’s ground Î IC’s

GND Î CBulk’s ground.

Approach 2: IC’s GND Î Auxiliary winding’s

ground Î CBulk’s ground (Trace 2ÎTrace 1Î

Trace 3).

Approach 3: IC’s GND Î CBulk’s ground and

auxiliary winding’s ground Î CBulk’s ground.

System Side

PFC Stage

ƒ Auxiliary winding of PFC choke and RCS,PFC should

be connected to CBulk’s ground singly (Trace 4 and

Trace 5).

ƒ Ground of bridge and the C-L-C filter should be

connected to CBulk’s ground directly.

ƒ Current loop constructed by the PFC choke, PFC

diode, PFC MOSFET, RCS,PFC, and CBulk should be as

short as possible (Loop 7).

PWM Stage

ƒ RCS should be connected to CBulk’s ground directly.

Keep it short and wide (Trace 6).

ƒ Current loop constructed by the CBulk, XFMR, PWM

MOSFET, and RCS should be as short as possible

(Loop 8).

ƒ RCD snubber should be close to XFMR and drain of

PWM MOSFET.

ƒ Ground of photo-coupler should be connected to

IC’s GND.

ƒ On the secondary side, current loop constructed by

XFMR, Schottky, and output capacitor should be as

short as possible (Loop 9).

ƒ Connections of Y Capacitor:

Approach 1: Y CAP’s primary ground Î CBulk’s

ground Î bridge’s ground.

Approach 2: Y CAP’s primary ground Î bridge’s

ground Î CBulk’s ground.

© 2010 Fairchild Semiconductor Corporation

Rev. 1.0.1 • 8/24/10

14

www.fairchildsemi.com

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