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DSP56307UM

24-BIT DIGITAL SIGNAL PROCESSOR

Motorola => Freescale 

Signals/Connections

Interrupt and Mode Control

Table 1-9 Interrupt and Mode Control (Continued)

Signal Name

Type

State During

Reset

Signal Description

MODB

Input Input

Mode Select BÑMODB is an active-low

Schmitt-trigger input, internally synchronized to

CLKOUT. MODA, MODB, MODC, and MODD select

one of 16 initial chip operating modes, latched into the

OMR when the RESET signal is deasserted.

IRQB

MODC

Input

Input Input

External Interrupt Request BÑAfter reset, this input

becomes a level-sensitive or negative-edge-triggered,

maskable interrupt request input during normal

instruction processing. If IRQB is asserted

synchronous to CLKOUT, multiple processors can be

resynchronized using the WAIT instruction and

asserting IRQB to exit the wait state. If the processor is

in the stop standby state and IRQB is asserted, the

processor will exit the stop state.

Mode Select CÑMODC is an active-low

Schmitt-trigger input, internally synchronized to

CLKOUT. MODA, MODB, MODC, and MODD select

one of 16 initial chip operating modes, latched into the

OMR when the RESET signal is deasserted.

IRQC

Input

External Interrupt Request CÑAfter reset, this input

becomes a level-sensitive or negative-edge-triggered,

maskable interrupt request input during normal

instruction processing. If IRQC is asserted

synchronous to CLKOUT, multiple processors can be

resynchronized using the WAIT instruction and

asserting IRQC to exit the wait state. If the processor is

in the stop standby state and IRQC is asserted, the

processor will exit the stop state.

Not Recommended for New Design

1-12

DSP56307 Technical Data

MOTOROLA

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