DM9003 데이터 시트보기 (PDF) - Davicom Semiconductor, Inc.

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DM9003

10/100 Mbps 2-port Ethernet Switch Controller with General Processor Interface

Davicom Semiconductor, Inc. 

DM9003

2-port Switch with Processor Interface

6.25 TX/RX Memory Size Control Register (3FH) ............................................................................................. 22

6.26 Switch Control Register (52H).................................................................................................................... 22

6.27 VLAN Control Register (53H) ..................................................................................................................... 22

6.28 DSP PHY Control Register (58H~59H)....................................................................................................... 23

6.29 Per Port Control/Status Index Register (60H)........................................................................................... 23

6.30 Per Port Control Data Register (61H) ........................................................................................................ 23

6.31 Per Port Status Data Register (62H) .......................................................................................................... 24

6.32 Per Port Forward Control Register (65H) .................................................................................................. 24

6.33 Per Port Ingress and Egress Control Register (66H)............................................................................... 25

6.34 Per Port Bandwidth Control Setting Register (67H) ................................................................................ 26

6.35 Per Port Block Unicast Ports Control Register (68H) .............................................................................. 27

6.36 Per Port Block Multicast Ports Control Register (69H) ........................................................................... 27

6.37 Per Port Block Broadcast Ports Control Register (6AH)......................................................................... 27

6.38 Per Port Block Unknown Ports Control Register (6BH) .......................................................................... 27

6.39 Per Port Priority Queue Control Register (6DH)....................................................................................... 27

6.40 Per Port VLAN Tag Low Byte Register (6EH) ........................................................................................... 28

6.41 Per Port VLAN Tag High Byte Register (6FH)........................................................................................... 28

6.42 MIB Counter Port Index Register (80H) ..................................................................................................... 28

6.43 MIB Counter Data Registers (81H~84H) .................................................................................................... 28

6.44 Port-Based VLAN Mapping Table Registers (B0H~BFH)......................................................................... 29

6.45 TOS Priority Map Registers (C0H~CFH).................................................................................................... 29

4

Preliminary datasheet

DM9003-15-DS-P05

April 9, 2009

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