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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

CY7C4225-10AXI 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY7C4225-10AXI
Cypress
Cypress Semiconductor Cypress
CY7C4225-10AXI Datasheet PDF : 25 Pages
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CY7C4205/CY7C4215
CY7C4225/CY7C4245
Switching Characteristics Over the Operating Range (continued)
Parameter
tHF
tXO
tXI
tXIS
tSKEW1
tSKEW2
tSKEW3
Description
Clock to half-full flag
Clock to expansion out
Expansion in pulse width
Expansion in set-up time
Skew time between read clock and write clock for
full flag
Skew time between read clock and write clock for
empty flag
Skew time between read clock and write clock for
programmable almost empty and programmable
almost full flags.
-10
Min
Max
12
7
3
4.5
5
5
10
Switching Waveforms
Figure 5. Write Cycle Timing
-15
Min
Max
Unit
16
ns
10
ns
6.5
ns
5
ns
6
ns
6
ns
15
ns
tCLKH
tCLK
tCLKL
WCLK
–D17
WEN
FF
tWFF
tDS
tENS
tDH
tENH
tWFF
NO OPERATION
RCLK
tSKEW1[17]
REN
Note
17.
tthSKeErWis1inigs
the minimum time between a
edge of RCLK and the rising
rising
edge
RCLK edge
of WCLK is
and
less
a rising WCLK edge to guarantee that FF will go HIGH during the
than tSKEW1, then FF may not change state until the next WCLK
current
edge.
clock
cycle.
If
the
time
between
Document Number: 001-45652 Rev. *B
Page 12 of 25
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