CY22394FXIT 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY22394FXIT Datasheet PDF : 17 Pages
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CY22393
CY22394
CY22395
Addr S2 (1,0)
40H 000
41H
42H
43H 001
44H
45H
46H 010
47H
48H
49H 011
4AH
4BH
4CH 100
4DH
4EH
4FH 101
50H
51H
52H 110
53H
54H
55H 111
56H
57H
b7
DivSel
DivSel
DivSel
DivSel
DivSel
DivSel
DivSel
DivSel
b6
PLL1_En
PLL1_En
PLL1_En
PLL1_En
PLL1_En
PLL1_En
PLL1_En
PLL1_En
b5
b4
b3
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
PLL1_Q[7:0]
PLL1_P[7:0]
PLL1_LF[2:0]
b2
PLL1_PO
PLL1_PO
PLL1_PO
PLL1_PO
PLL1_PO
PLL1_PO
PLL1_PO
PLL1_PO
b1
b0
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
PLL1_P[9:8]
I2C Serial Programming Protocol and Timing
The CY22393, CY22394 and CY22395 have an I2C 2-wire
serial interface for in-system programming. They use the
SDAT and SCLK pins, and operate up to 400 kbit/s in Read or
Write mode. The basic Write serial format is as follows:
Start Bit; 7-bit Device Address (DA); R/W Bit; Slave Clock
Acknowledge (ACK); 8-bit Memory Address (MA); ACK; 8-bit
Data; ACK; 8-bit Data in MA+1 if desired; ACK; 8-bit Data in
MA+2; ACK; etc. until STOP Bit. The basic serial format is
illustrated in Figure 2 on page 10.
Default Startup Condition for the CY22393/94/95
The default (programmed) condition of each device is
generally set by the distributor, who programs the device using
a customer specified JEDEC file produced by CyClocksRT,
Cypress’s proprietary development software. Parts shipped by
the factory are blank and unprogrammed. In this condition, all
bits are set to 0, all outputs are tri-stated, and the crystal oscil-
lator circuit is active.
While users can develop their own subroutine to program any
or all of the individual registers as described in the following
pages, it may be easier to simply use CyClocksRT to produce
the required register setting file.
Device Address
The device address is a 7-bit value that is configured during
Field Programming. By programming different device
addresses, two or more parts are connected to the serial
interface and can be independently controlled. The device
address is combined with a read/write bit as the LSB and is
sent after each start bit.
The default serial interface address is 69H, but should there
be a conflict with any other devices in your system, this can
also be changed using CyClocksRT.
Data Valid
Data is valid when the clock is HIGH, and can only be transi-
tioned when the clock is LOW as illustrated in Figure 3 on page
10.
Data Frame
Every new data frame is indicated by a start and stop
sequence, as illustrated in Figure 4 on page 11.
Document #: 38-07186 Rev. *C
Page 8 of 17
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