CS8415A-CZR 데이터 시트보기 (PDF) - Cirrus Logic

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CS8415A-CZR

96 kHz Digital Audio Interface Receiver

Cirrus Logic 

CS8415A

13. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958 RECEIVER COMPONENTS .......................... 35

13.1 AES3 Receiver External Components ........................................................................................ 35

13.2 Isolating Transformer Requirements .......................................................................................... 36

14. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........................ 37

14.1 AES3 Channel Status (C) Bit Management ................................................................................ 37

14.2 Accessing the E Buffer ............................................................................................................... 37

14.2.1 Reserving the First 5 Bytes in the E Buffer .................................................................... 38

14.2.2 Serial Copy Management System (SCMS) .................................................................... 38

14.2.3 Channel Status Data E Buffer Access ........................................................................... 38

14.2.3.1 One-Byte Mode .................................................................................................. 38

14.2.3.2 Two-Byte Mode .................................................................................................. 39

14.3 AES3 User (U) Bit Management ................................................................................................. 39

15. APPENDIX C: PLL FILTER ............................................................................................................... 40

15.1 General ....................................................................................................................................... 40

15.2 External Filter Components ........................................................................................................ 41

15.2.1 General .......................................................................................................................... 41

15.2.2 Capacitor Selection ........................................................................................................ 41

15.2.3 Circuit Board Layout ...................................................................................................... 41

15.3 Component Value Selection ....................................................................................................... 42

15.3.1 Identifying the Part Revision .......................................................................................... 42

15.3.2 External Components .................................................................................................... 42

15.3.3 Jitter Tolerance .............................................................................................................. 43

15.3.4 Jitter Attenuation ............................................................................................................ 44

16. REVISION HISTORY ........................................................................................................................ 45

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