CS8415A-CZR 데이터 시트보기 (PDF) - Cirrus Logic

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CS8415A-CZR

96 kHz Digital Audio Interface Receiver

Cirrus Logic 

2. TYPICAL CONNECTION DIAGRAM

CS8415A

+5.0 V

Analog

Supply*

Ferrite *

Bead

0.1µF

0.1µF

+3.3 V or +5.0 V

Digital Supply

* * AES3/

SPDIF

Sources

Clock Control

Hardware

Control

VA+

VL+

RXP6 CS8415A

RXP5

OLRCK

RXP4

OSCLK

RXP3

RXP2

SDOUT

RXP1

RXP0

RXN0

SDA/CDOUT

RMCK

AD0/CS

SCL/CCLK

AD1/CDIN

INT

U

EMPH/AD 2

RERR

DGND2

RST

H/S

AGND FILT

DGND

3-wire Serial

Audio Input

Device

Microcontroller

RFILT

CFILT

CRIP

* A separate analog supply is only necessary in applications where RMCK is used

for a jitter sensitive task. For applications where RMCK is not used for a jitter

sensitive task, connect VA+ to VD+ via a ferrite bead. Keep the decoupling

capacitor between VA+ and AGND.

* * Please see section 5.1 "7:1 S/PDIF Input Multiplexer" and Appendix A for typical

input configurations and recommended input circuits.

Figure 5. Recommended Connection Diagram for Software Mode

DS470F4

11

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