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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

CS61305A 데이터 시트보기 (PDF) - Cirrus Logic

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CS61305A
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CS61305A Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CS61305A
SWITCHING CHARACTERISTICS (TA = -40° to 85°C; TV+, RV+ = ±5%;
Inputs: Logic 0 = 0V, Logic 1 = RV+)
Parameter
SDI to SCLK Setup Time
SCLK to SDI Hold Time
SCLK Low Time
SCLK High Time
SCLK Rise and Fall Time
CS to SCLK Setup Time
SCLK to CS Hold Time
CS Inactive Time
SCLK to SDO Valid
CS to SDO High Z
Input Valid To PCS Falling Setup Time
PCS Rising to Input Invalid Hold Time
PCS Active Low Time
Notes: 31. Output load capacitance = 50pF.
Symbol Min
Typ
tdc
50
-
tcdh
50
-
tcl
240
-
tch
240
-
tr, tf
-
-
tcc
50
-
tcch
50
-
tcwh
250
-
(Note 31) tcdv
-
-
tcdz
-
100
tsu4
50
-
th4
50
-
tpcsl
250
-
Max Units
-
ns
-
ns
-
ns
-
ns
50
ns
-
ns
-
ns
-
ns
200
ns
-
ns
-
ns
-
ns
-
ns
tr
tf
Any Digital Output
90%
10%
90%
10%
Figure 1. Signal Rise and Fall Characteristics
RCLK
RPOS
RNEG
RDATA
BPV
RCLK
6
tpw1
tpwl1
t su1
tpwh1
t h1
EXTENDED
HARDWARE
MODE OR
HOST MODE
(CLKE = 1)
Figure 2. Recovered Clock and Data Switching Characteristics
HARDWARE
MODE OR
HOST MODE
(CLKE = 0)
DS157PP3

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