CDP1852D3 데이터 시트보기 (PDF) - Intersil
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CDP1852D3 Datasheet PDF : 7 Pages
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CDP1852/3, CDP1852C/3
(NOTE 1)
CS1 • CS2
CLOCK
DATA IN
DATA OUT
SR
CLEAR
tRDO
tRSR
tCLR
(NOTE 2)
tWW
tSH
tDS
tDH
tDDO
tWDO
tSSR
tCLK
tCSR
NOTES:
1. CS1 • CS2 is the overlap of the CS1 = 0 and CS2 = 1.
2. Write is the overlap of CS1 • CS2 and clock.
MODE = 1 TRUTH TABLE
CLOCK
CS1 • CS2 (NOTE 1)
CLEAR
DATA OUT EQUALS
0
X
0
0
CS1
0
X
1
Data Latch
or
X
0
1
Data Latch
CS2
SERVICE REQUEST
TRUTH TABLE
Clock • (CS1 • CS2)
or
CLEAR = 0
1
1
X
Data In
SR = 1
SR = 0
NOTE:
1. CS1 • CS2 = CS1 = 0, CS2 = 1
FIGURE 4. MODE = 1 OUTPUT PORT TIMING WAVEFORMS AND TRUTH TABLES
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