BD3916FVM 데이터 시트보기 (PDF) - ROHM Semiconductor
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BD3916FVM Datasheet PDF : 5 Pages
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The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable
result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as
well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a
way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the VEE
(P substrate) voltage to input pins. Keep in mind that the IC may malfunction in strong magnetic fields.
(Pin A)
Resistor
Transistor (NPN)
B
(Pin B) C
E
P+
N
P
P
N
P+
N
Parasitic elements
P+
N
N
P
N
P+
N
P substrate
VEE
VEE
Parasitic elements
or Transistors
(Pin B)
BC
E
VEE
Parasitic elements or
Transistors
(Pin A)
Parasitic elements
8) Ground patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing
a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND
wiring pattern of any external parts, either.
9) Applications or inspection processes where the potentials of the VCC pin and other pins may be reversed from their normal
states may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1,000μF or lower
in case VCC is shorted with the GND pin while the external capacitor is charged. It is recommended to insert a diode
for preventing back current flow in series with VCC or bypass diodes between VCC and each pin.
Back current prevention diode
Bypass diode
VCC Pin
10) Thermal shutdown circuit (TSD)
This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within
the specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the attendant rise in the junction temperature (Tj) will trigger the TSD circuit to turn off all
output power elements.
The circuit automatically resets once the junction temperature (Tj) drops. Operation of the TSD circuit presumes that
the IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit.
11) Overcurrent protection circuit (OCP)
The IC incorporates a built-in overcurrent protection circuit that operates according to the output current capacity.
This circuit serves to protect the IC from damage when the load is shorted. The protection circuit is designed to limit
current flow by not latching in the event of a large and instantaneous current flow originating from a large capacitor
or other component. This protection circuits is effective in preventing damage due to sudden and unexpected accidents.
However, the IC should not be used in applications characterized by the continuous operation or transitioning of the
protection circuits. At the time of thermal designing, keep in mind that the current capacity has negative characteristics
to temperatures.
REV. C
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