AS7C3364PFS32B 데이터 시트보기 (PDF) - Alliance Semiconductor

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AS7C3364PFS32B

3.3V 64K X 32/36 pipeline burst synchronous SRAM

Alliance Semiconductor 

Timing waveform of write cycle

CLK

tCYC

tCH

tCL

ADSP

tADSPS

tADSPH

ADSC

tAS

tAH

Address

A1

A2

BWE

BW[a:d]

CE0, CE2

tCSS

tCSH

AS7C3364PFS32B

AS7C3364PFS36B

®

tADSCS

tADSCH

ADSC LOADS NEW ADDRESS

A3

tWS

tWH

CE1

ADV

ADV SUSPENDS BURST

tADVS

tADVH

OE

Din

tDS

tDH

D(A1)

D(A2) D(A2Ý01) D(A2Ý01) D(A2Ý10) D(A2Ý11) D(A3)

D(A3Ý01) D(A3Ý10)

Read

Q(A1)

Sus-

pend

Write

D(A1)

Read

Q(A2)

Suspend

Write

D(A 2)

ADV

Burst

Write

D(A 2Ý01)

Suspend ADV

Write

Burst

D(A 2Ý01) Write

D(A 2Ý10)

ADV

Burst

Write

D(A 2Ý11)

Write

D(A 3)

Burst

ADV

Write

Burst

D(A 3Ý01) Write

D(A 3Ý10)

Note: Ý = XOR when LBO = high/no connect; Ý = ADD when LBO = low.

12/10/04; v.1.4

Alliance Semiconductor

P. 12 of 19

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