AS7C33128PFD32A 데이터 시트보기 (PDF) - Alliance Semiconductor

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AS7C33128PFD32A

3.3V 128K × 32/36 pipeline burst synchronous SRAM

Alliance Semiconductor 

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Timing waveform of read/write cycle

tCYC

tCH

tCL

CLK

ADSP

tADSPS

tADSPH

Address

A1

tAS

tAH

A2

A3

GWE

tWS

tWH

CE0, CE2

CE1

tADVS

tADVH

ADV

OE

DIN

DOUT

(pipeline mode)

tCDF

DOUT

(flow-through mode)

tLZC

tCD

Q(A1)

tDS

tDH

D(A2)

tHZOE

Q(A1)

Note: Ý = XOR when MODE = HIGH/No Connect; Ý = ADD when MODE = LOW.

AS7C33128PFD32A

AS7C33128PFD36A

tLZOE

tOE

Q(A3)

tOH

Q(A3Ý01) Q(A3Ý10)

Q(A3Ý11)

Q(A3Ý01)

Q(A3Ý10)

Q(A3Ý11)

3/22/01; v.1.0

Alliance Semiconductor

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