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AS5C1008 데이터 시트보기 (PDF) - Austin Semiconductor

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AS5C1008 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Austin Semiconductor, Inc.
SRAM
AS5C1008
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC<TA<+125oC or -40oC to +85oC; Vcc = 5V+10%)
PARAMETER
CONDITIONS
-15
-20
-25
SYMBOL MIN MAX MIN MAX MIN MAX UNITS
Dynamic Operating
Current
Vcc=MAX, IOUT = 0mA,
CE1 = VIL and CE2 = VIH, f = fmax
ICC1
180
150
140 mA
TTL Standby Current -
TTL Inputs
Vcc=MAX, VIN = VIH or VIL,
CE\1> VIH and CE2 > VIL, f = fmax
ISB1
90
75
70 mA
Vcc=MAX, CE\1 > Vcc -0.2V, or CE2
CMOS Standby Current -
CMOS Inputs
< 0.2V, VIN > Vcc -0.2V and
ISB2
VIN < 0.2V, f = 0
10
10
10 mA
Input Leakage Current GND < VIN < Vcc
ILI
-10 10 -10 10 -10 10 µA
Output Leakage Current GND < VOUT < Vcc
Output Disabled
ILO
-10 10 -10 10 -10 10 µA
Output High Voltage
Vcc = MIN, IOH = -4.0 mA
VOH 2.4
2.4
2.4
V
Output Low Voltage
Input High Voltage
Vcc = MIN, IOL = 8.0 mA
VOL
0.4
0.4
0.4 V
VIH
2.2
Vcc
+0.5
2.2
Vcc
+0.5
2.2
Vcc
+0.5
V
Input Low Voltage
VIL -0.5 0.8 -0.5 0.8 -0.5 0.8 V
PIN DESCRIPTIONS
A0 - A16: Address Inputs
These 17 address inputs select one of the 131,072 8-bit words in
the RAM.
CE\1: Chip Enable 1 Input
CE\1 is asserted LOW to read from or write to the device. If Chip
Enable 1 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
CE2: Chip Enable 2 Input
CE2 is asserted HIGH to read from or write to the device. If Chip
Enable 2 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
OE\: Output Enable Input
The Output Enable Input is asserted LOW. If asserted LOW
while CE\1 is asserted (LOW) and CE2 is asserted (HIGH) and
WE\ is deasserted (HIGH), data from the SRAM will be present
on the I/O pins. The I/O pins will be in the high-impedance
state when OE\ is deasserted.
WE\: Write Enable Input
The Write Enable input is asserted LOW and controls read and
write operations. When CE\1 and WE\ are both asserted (LOW)
and CE2 is asserted (HIGH) input data present on the I/O pins
will be written into the selected memory location.
AS5C1008
Rev. 3.6 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3

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