CXB1562AQ 데이터 시트보기 (PDF) - Sony Semiconductor
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CXB1562AQ Datasheet PDF : 16 Pages
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CXB1562AQ
2. Alarm block
In order to operate the alarm block, give the voltage difference between Pins 30 and 31 to set an alarm level
and connect the peak hold capacitor C3 shown in Fig. 3.
This IC has two setting methods of alarm level; one is to connect VEE to Pin 3 and leave Pins 30 and 31 open
to set an alarm level default value (8mV for input conversion). The other is to connect Pin 3 to VEE and set a
desired alarm level using the external resistors REX1 and REX2 and REX3 shown in Fig. 3.
Connect REX1 between Pins 30 and 31, or between Pin 30 and VCC when less alarm level is desired to be set
than its default value; connect REX2 between Pin 31 and Vcc potential when more alarm level is desired to be
set than its default value. However, the Pin 31 voltage must be higher than that of Pin 30. Refer to Figs. 5, 8 to
11 for this alarm level setting.
This IC also features two-level setting of identification maximum voltage amplitude. The amplitude is set to
50mVp-p when Pin 4 is left open (High level) and it is set to 20mVp-p when Pin 4 is Low level. Therefore, noise
margin can be increased by setting Pin 4 to Low level when small signal is input. The relation of input voltage
and peak hold output voltage is shown in Fig. 6.
In the relation between the alarm setting level and hysteresis width, the hysteresis width is designed to
maintain a constant gain (design target value: 6dB) as shown in Fig. 4. The C3 capacitance value should be
set so as to obtain desired assert time and deassert time settings for the alarm signal.
The electrical characteristics for the SD response assert and deassert times are guaranteed only when the
waveforms are input as shown in the timing chart of Fig. 7.
The typical values of REX1, REX2, REX3 and C3 are as follows: (Approximately 10pF capacitor is built in Pins 28
and 29 each.)
REX1 : 217Ω (when the alarm level is set to 4mV for input conversion.)
REX2 : 634Ω (when the alarm level is set to 19mV for input conversion.)
REX3 : 4kΩ (when the alarm level is set to 4mV for input conversion.)
C3 : 470pF
The table below shows the alarm logic.
Optical signal input state
Signal input
Signal interruption
SD
High level
Low level
SD
Low level
High level
Ra1, Ra2A and Ra2B values
are typical values.
VCCA
From
Limiting Amplifier
Peak hold
SD
Ra1 993
SD
Ra2A
110.3
Ra2B
110.3
Peak hold
IC interior
31
IC exterior
Vcs
30 3
43
VccA
∆V
31
30
10p
29
C3
REX2
REX1
REX3
Vcc
Vcc
Vcc
Fig. 3
– 12 –
VccA
10p
28
C3
Vcc
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