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7411(2017) 데이터 시트보기 (PDF) - Analog Devices

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7411
(Rev.:2017)

SPI-/I2C-Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC

Analog Devices

7411 Datasheet PDF : 36 Pages

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Data Sheet

AIN2 VLOW Limit Register (Read/Write) [Address = 2Ch]

This limit register is an 8-bit read/write register that stores the

AIN2 input lower limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN2 value has to be less than or equal to the value in

this register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 47. AIN2 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN3 VHIGH Limit Register (Read/Write) [Address = 2Dh]

This limit register is an 8-bit read/write register that stores the

AIN3 input upper limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN3 value has to be greater than the value in this

times less than the resolution of the 10-bit ADC. The default

value is full-scale voltage.

Table 48. AIN3 VHIGH Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN3 VLOW Limit Register (Read/Write) [Address = 2Eh]

This limit register is an 8-bit read/write register that stores the

AIN3 input lower limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN3 value has to be less than or equal to the value in

this register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 49. AIN3 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN4 VHIGH Limit Register (Read/Write) [Address = 2Fh]

This limit register is an 8-bit read/write register that stores the

AIN4 input upper limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN4 value has to be greater than the value in this

times less than the resolution of the 10-bit ADC. The default

value is full-scale voltage.

ADT7411

Table 50. AIN4 VHIGH Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN4 VLOW Limit Register (Read/Write) [Address = 30h]

This limit register is an 8-bit read/write register that stores the

AIN4 input lower limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the measured

AIN4 value has to be less than or equal to the value in this

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 51. AIN4 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN5 VHIGH Limit Register (Read/Write) [Address = 31h]

This limit register is an 8-bit read/write register that stores the

AIN5 input upper limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN5 value has to be greater than the value in this

times less than the resolution of the 10-bit ADC. The default

value is full-scale voltage.

Table 52. AIN5 VHIGH Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

AIN5 VLOW Limit Register (Read/Write) [Address = 32h]

This limit register is an 8-bit read/write register that stores the

AIN5 input lower limit that causes an interrupt and activates

the INT/INT output (if enabled). For this to happen, the

measured AIN5 value has to be less than or equal to the value in

this register. Because it is an 8-bit register, the resolution is four

times less than the resolution of the 10-bit ADC. The default

value is 0 V.

Table 53. AIN5 VLOW Limit

D7 D6 D5 D4 D3 D2 D1 D0

1 Default settings at power-up.

Rev. C | Page 27 of 36

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