7411(2017) 데이터 시트보기 (PDF) - Analog Devices

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7411
(Rev.:2017)

SPI-/I2C-Compatible, 10-Bit Digital Temperature Sensor and 8-Channel ADC

Analog Devices 

ADT7411

Table 31.

Bit Function

C3:C0 In single-channel mode, these bits select between VDD,

the internal temperature sensor, external temperature

sensor/AIN1, AIN2 to AIN8 for conversion. The default is VDD.

0000 = VDD.

0001 = Internal Temperature Sensor.

0010 = External Temperature Sensor/AIN1. (Bit C1 and

Bit C2 of Control Configuration 1 affect this selection.)

0011 = AIN2.

0100 = AIN3.

0101 = AIN4.

0110 = AIN5.

0111 = AIN6.

1000 = AIN7.

1001 = AIN8.

1010 to 1111 = Reserved.

C4 Selects between single-channel and round robin

conversion cycle. Default is round robin.

0 = Round robin.

1 = Single-channel.

C5 Default condition is to average every measurement on

all channels 16 times. This bit disables this averaging.

Channels affected are temperature, analog inputs, and VDD.

0 = Enable averaging.

1 = Disable averaging.

C6 SMBus timeout on the serial clock puts a 25 ms limit on

the pulse width of the clock, ensuring that a fault on the

master SCL does not lock up the SDA line.

0 = Disable SMBus timeout.

1 = Enable SMBus timeout.

C7 Software Reset. Setting this bit to a 1 causes a software

reset. All registers reset to their default settings.

Control Configuration 3 Register (Read/Write)

[Address = 1Ah]

This configuration register is an 8-bit read/write register that is

used to set up some of the operating modes of the ADT7411.

Table 32. Control Configuration 3

D7 D6 D5 D4 D3 D2 D1 D0

C7 C6 C5 C4 C3 C2 C1 C0

01

01

01

01

01

01

01

01

1 Default settings at power-up.

Data Sheet

Table 33.

Bit Function

C0

Selects between fast and normal ADC conversion speeds.

0 = ADC clock at 1.4 kHz.

1 = ADC clock at 22.5 kHz. D+ and D− analog filters

are disabled.

C1:C2 Reserved. Only write 0s.

C3

Reserved. Write only 1 to this bit.

C4

Selects the ADC reference to be either Internal VREF or

VDD for analog inputs.

0 = Int VREF

1 = VDD

C5:C7 Reserved. Only write 0s.

Interrupt Mask 1 Register (Read/Write) [Address = 1Dh]

This mask register is an 8-bit read/write register that can be

used to mask out any interrupts that can cause the INT/INT pin

to go active.

Table 34. Interrupt Mask 1

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

01

01

01

01

01

01

01

01

1 Default settings at power-up.

Table 35.

Bit Function

D0 0 = Enable internal THIGH interrupt

1 = Disable internal THIGH interrupt

D1 0 = Enable internal TLOW interrupt

1 = Disable internal TLOW interrupt

D2 0 = Enable external THIGH interrupt or AIN1 interrupt

1 = Disable external THIGH interrupt or AIN1 interrupt

D3 0 = Enable external TLOW interrupt

1 = Disable external TLOW interrupt

D4 0 = Enable external temperature fault interrupt

1 = Disable external temperature fault interrupt

D5 0 = Enable AIN2 interrupt

1 = Disable AIN2 interrupt

D6 0 = Enable AIN3 interrupt

1 = Disable AIN3 interrupt

D7 0 = Enable AIN4 interrupt

1 = Disable AIN4 interrupt

Rev. C | Page 24 of 36

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