ADE7880ACPZ-RL 데이터 시트보기 (PDF) - Analog Devices
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ADE7880ACPZ-RL Datasheet PDF : 107 Pages
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Data Sheet
Table 3. SPI Interface Timing Parameters
Parameter
SS to SCLK Edge
SCLK Period
SCLK Low Pulse Width
SCLK High Pulse Width
Data Output Valid After SCLK Edge
Data Input Setup Time Before SCLK Edge
Data Input Hold Time After SCLK Edge
Data Output Fall Time
Data Output Rise Time
SCLK Rise Time
SCLK Fall Time
MISO Disable After SS Rising Edge
SS High After SCLK Edge
1 Guaranteed by design.
Symbol
tSS
tSL
tSH
tDAV
tDSU
tDHD
tDF
tDR
tSR
tSF
tDIS
tSFS
Min
50
0.4
175
175
100
5
0
SS
tSS
tSFS
SCLK
tSL
tDAV
tSH
tSF
tSR
tDIS
MISO
MSB
INTERMEDIATE BITS
LSB
MOSI
tDF
tDR
INTERMEDIATE BITS
tDSU
MSB IN
tDHD
Figure 3. SPI Interface Timing
LSB IN
ADE7880
Max
Unit
ns
40001
μs
ns
ns
100
ns
ns
ns
20
ns
20
ns
20
ns
20
ns
200
ns
ns
Rev. C | Page 9 of 107
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