AD7693 데이터 시트보기 (PDF) - Analog Devices
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AD7693 Datasheet PDF : 24 Pages
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Preliminary Technical Data
CS MODE 4-WIRE, NO BUSY INDICATOR
This mode is usually used when multiple AD7693s are
connected to an SPI-compatible digital host.
A connection diagram example using two AD7693s is shown in
Figure 37, and the corresponding timing is given in Figure 38.
With SDI high, a rising edge on CNV initiates a conversion,
selects the CS mode, and forces SDO to high impedance. In this
mode, CNV must be held high during the conversion phase and
the subsequent data readback. (If SDI and CNV are low, SDO is
driven low.) Prior to the minimum conversion time, SDI can be
used to select other SPI devices, such as analog multiplexers,
but SDI must be returned high before the minimum conversion
AD7693
time elapses and then held high for the maximum possible
conversion time to avoid the generation of the busy signal
indicator. When the conversion is complete, the AD7693 enters
the acquisition phase and powers down. Each ADC result can
be read by bringing its SDI input low, which consequently
outputs the MSB onto SDO. The remaining data bits are clocked
by subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host using the SCK falling edge will allow a faster
reading rate, provided it has an acceptable hold time. After the
16th SCK falling edge, or when SDI goes high, whichever is
earlier, SDO returns to high impedance and another AD7693
can be read.
CS2
CS1
CONVERT
CNV
SDI AD7693 SDO
CNV
SDI AD7693 SDO
DIGITAL HOST
SCK
SCK
DATA IN
CLK
Figure 37. 4-Wire CS Mode Without Busy Indicator Connection Diagram
CNV
ACQUISITION
tCONV
CONVERSION
tSSDICNV
SDI(CS1)
tHSDICNV
tCYC
tACQ
ACQUISITION
SDI(CS2)
SCK
SDO
tSCKL
tSCK
1
2
3
14
15
16
tHSDO
tSCKH
tEN
tDSDO
D15 D14 D13
D1 D0
17
18
D16 D15
30
31
32
tDIS
D1 D0
Figure 38. 4-Wire CS Mode Without Busy Indicator Serial Interface Timing
Rev. PrB | Page 19 of 24
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