AD7682 데이터 시트보기 (PDF) - Analog Devices
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AD7682 Datasheet PDF : 28 Pages
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AD7682/AD7689
APPLICATION HINTS
LAYOUT
The printed circuit board that houses the AD7682/AD7689
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. The pinout of
the AD7682/AD7689, with all its analog signals on the left side
and all its digital signals on the right side, eases this task.
Avoid running digital lines under the device because these
couple noise onto the die unless a ground plane under the
AD7682/AD7689 is used as a shield. Fast switching signals,
such as CNV or clocks, should not run near analog signal paths.
Crossover of digital and analog signals should be avoided.
At least one ground plane should be used. It can be common or
split between the digital and analog sections. In the latter case,
the planes should be joined underneath the AD7682/AD7689.
The AD7682/AD7689 voltage reference input REF has a
dynamic input impedance and should be decoupled with
minimal parasitic inductances. This is done by placing the
reference decoupling ceramic capacitor close to, ideally right up
against, the REF and GND pins and connecting them with wide,
low impedance traces.
Finally, the power supplies VDD and VIO of the AD7682/
AD7689 should be decoupled with ceramic capacitors, typically
100 nF, placed close to the AD7682/AD7689 and connected
using short, wide traces to provide low impedance paths and
reduce the effect of glitches on the power supply lines.
EVALUATING AD7682/AD7689 PERFORMANCE
Other recommended layouts for the AD7682/AD7689 are
outlined in the documentation of the evaluation board for the
AD7682/AD7689 (EVAL-AD7682CBZ/EVAL-AD7689CBZ).
The evaluation board package includes a fully assembled and
tested evaluation board, documentation, and software for
controlling the board from a PC via the evaluation controller
board, EVAL-CONTROL BRD3.
Rev. 0 | Page 26 of 28
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