AD7679(Rev0) 데이터 시트보기 (PDF) - Analog Devices
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AD7679 Datasheet PDF : 28 Pages
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AD7679
Pin No. Mnemonic
35
CNVST
36
AGND
37
REF
38
REFGND
39
IN–
43
IN+
46
REFBUFIN
48
PDBUF
Type1
DI
P
AI
AI
AI
AI
AI
DI
Description
Start Conversion. If CNVST is held HIGH when the acquisition phase (t8) is complete, the next falling
edge on CNVST puts the internal sample/hold into the hold state and initiates a conversion. If CNVST
is held LOW when the acquisition phase is complete, the internal sample/hold is put into the hold
state and a conversion is started immediately.
Must Be Tied to Analog Ground.
Reference Input Voltage and Internal Reference Buffer Output. Apply an external reference on this pin
if the internal reference buffer is not used. Should be decoupled effectively with or without the
internal buffer.
Reference Input Analog Ground.
Differential Negative Analog Input.
Differential Positive Analog Input.
Reference Buffer Input Voltage. The internal reference buffer has a fixed gain. It outputs 4.096 V
typically when 2.5 V is applied on this pin.
Allows Choice of Buffering Reference. When LOW, buffer is selected. When HIGH, buffer is
switched off.
1AI = Analog Input; AO = Analog Output; DI = Digital Input; DI/O = Bidirectional Digital; DO = Digital Output; P = Power.
Table 7. Data Bus Interface Definitions
MODE MODE1 MODE0 D0/OB/2C D1/A0 D2/A1
0
0
0
R[0]
R[1] R[2]
1
0
1
OB/2C
A0:0 R[2]
1
0
1
OB/2C
A0:1 R[0]
2
1
0
OB/2C
A0:0 A1:0
2
1
0
OB/2C
A0:0 A1:1
2
1
0
OB/2C
A0:1 A1:0
2
1
0
OB/2C
A0:1 A1:1
3
1
1
OB/2C
All Hi-Z
R[0:17] is the 18-bit ADC value stored in its output register.
D[3] D[4:9]
R[3] R[4:9]
R[3] R[4:9]
R[1]
All Hi-Z
All Hi-Z
All Hi-Z
All Hi-Z
D[10:11] D[12:15] D[16:17]
R[10:11] R[12:15] R[16:17]
R[10:11] R[12:15] R[16:17]
All Zeros
R[10:11] R[12:15] R[16:17]
R[2:3]
R[4:7]
R[8:9]
R[0:1]
All Zeros
All Zeros
R[0:1]
Serial Interface
Description
18-Bit Parallel
16-Bit High Word
16-Bit Low Word
8-Bit HIGH Byte
8-Bit MID Byte
8-Bit LOW Byte
8-Bit LOW Byte
Serial Interface
Rev. 0 | Page 10 of 28
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