AD1985JST-REEL 데이터 시트보기 (PDF) - Analog Devices

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AD1985JST-REEL

AC ’97 SoundMAX® Codec

Analog Devices 

AD1985

Headphone Volume Register (Index 0x04)

Reg Num Name

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

0x04

Headphones Volume HPM X X LHV4 LHV3 LHV2 LHV1 LHV0 HPRM1 X X RHV4 RHV3 RHV2 RHV1 RHV0 0x8000

1 For AC ’97 compatibility, Bit D7 (HPRM) is available only by setting the MSPLT bit in Register 0x76. The MSPLT bit enables separate mute bits for the left and right

channels.

This register controls the headphone volume for both stereo

Master and Headphone table on the previous page).

channels and mute bits. Each volume subregister contains five

bits, generating 32 volume levels with increments of 1.5 dB each.

Note that depending on the state of the AC97NC bit in Register

0x76, this register has the following additional functionality:

AC ’97 defines the 6-bit volume registers, therefore, to maintain

compatibility whenever the D5 or D13 bit is set to 1, its

respective lower five volume bits are automatically set to 1 by

the codec logic. On readback, all lower five bits will read 1s

whenever these bits are set to 1 (see the Volume Settings for

• For AC97NC = 0, the register has no control over the

SURR_OUT/HP_OUT outputs (see Register 0x38).

• For AC97NC = 1, the register controls the

SURR_OUT/HP_OUT output attenuators.

RHV[4:0]

HPRM

LHV[4:0]

HPM

Right Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the output

from 0 dB to a maximum attenuation of 46.5 dB.

Right Channel Mute. Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel

separately from the HPM bit. Otherwise, this bit will always read 0 and will have no effect when set to 1.

Left Headphone Volume Control. The least significant bit represents 1.5 dB. This register controls the output

from 0 dB to a maximum attenuation of 46.5 dB.

Headphones Volume Mute. When this bit is set to 1, both the left and right channels are muted, unless the

MSPLT bit in Register 0x76 is set to 1, in which case, this mute bit will only affect the left channel.

Rev. A | Page 16 of 48

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