AD1985JST-REEL 데이터 시트보기 (PDF) - Analog Devices
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AD1985JST-REEL Datasheet PDF : 48 Pages
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AD1985
Master Volume Register (Index 0x02)
Reg Num Name
D15 D14 D13 D12 D11 D10 D9 D8 D7
D6 D5 D4 D3 D2 D1 D0 Default
0x02
Master Volume MM X X LMV4 LMV3 LMV2 LMV1 LMV0 MMRM1 X X RMV4 RMV3 RMV2 RMV1 RMV0 0x8000
1 For AC ’97 compatibility, Bit D7 (MMRM) is available only by setting the MSPLT bit in Register 0x76. The MSPLT bit enables separate mute bits for the left and right
channels.
This register controls the LINE_OUT volume and mute bits.
Each volume subregister contains five bits, generating 32
volume levels with increments of 1.5 dB each.
AC ’97 defines the 6-bit volume registers, therefore, to maintain
compatibility whenever the D5 or D13 bit is set to 1, its
respective lower five volume bits are automatically set to 1 by
the codec logic. On readback, all lower five bits will read 1s
whenever these bits are set to 1.
Note that depending on the state of the AC97NC bit in Register
0x76, this register has the following additional functionality:
• For AC97NC = 0, the register controls the LINE_OUT output
attenuators only.
• For AC97NC = 1, the register controls the LINE_OUT, center,
and LFE output attenuators.
RMV[4:0]
MMRM
LMV[4:0]
MM
Right Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of 46.5 dB.
Right Channel Mute. Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel
separately from the MM bit. Otherwise, this bit will always read 0 and will have no effect when set to 1.
Left Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of 46.5 dB.
Master Volume Mute. When this bit is set to 1, all channels are muted, unless the MSPLT bit in Register 0x76 is
set to 1, in which case, this mute bit will only affect the left channels.
Volume Settings for Master and Headphone
Reg.
0x76
Control Bits
Master Volume (0x02) and Headphone Volume (0x04)
Left Channel Volume D[13:8]
Right Channel Volume D[5:0]
MSPLT1 D15 Write Readback Function
D71 Write Readback Function
0
0 00
00 0000
0 dB Gain
0000
x 00
00 0000
0000
0 dB Gain
0
0 00
00 1111
–22.5 dB Gain
1111
x 00
00 1111
1111
–22.5 dB Gain
0
0 01
01 1111
–46.5 dB Gain
1111
x 01
01 1111
1111
–46.5 dB Gain
0
0 1x xxxx 01 1111
–46.5 dB Gain
x 1x xxxx 01 1111
–46.5 dB Gain
0
1 xx xxxx xx xxxx
–∞ dB Gain, Muted
x xx xxxx xx xxxx
–∞ dB Gain, Muted
1
0 1x xxxx 01 1111
–46.5 dB Gain
1 xx xxxx xx xxxx
–∞ dB Gain, Only Right
Muted
1
1 xx xxxx xx xxxx
–∞ dB Gain, Only Left
0 1x xxxx 01 1111
–46.5 dB Gain
Muted
1
1 xx xxxx xx xxxx
–∞ dB Gain, Left Muted
1 xx xxxx xx xxxx
–∞ dB Gain, Right Muted
Note: x in the above table is a wild card, meaning the value has no effect.
1 For AC ’97 compatibility, Bit D7 is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If
MSPLT is not set, Bit D7 has no effect.
Rev. A | Page 15 of 48
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