A8502 데이터 시트보기 (PDF) - Allegro MicroSystems

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A8502

Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver

Allegro MicroSystems 

A8502

Wide Input Voltage Range, High Efficiency

Fault Tolerant LED Driver

Thermal Characteristics may require derating at maximum conditions, see application information

Characteristic

Symbol

Test Conditions*

Value

Package Thermal Resistance

On 2-layer PCB, 3 in2.

RθJA

On 4-layer PCB based on JEDEC standard

48.5

34

*Additional thermal information available on the Allegro website

Unit

ºC/W

ºC/W

VDD 1

16 LED2

PGND 2

15 LED1

OVP 3

14 AGND

Pin-out Diagram

SW 4

GATE 5

PAD

13 ISET

12 FSET/SYNC

VSENSE 6

11 PWM/EN

VIN 7

10 APWM

FAULT 8

9 COMP

Terminal List Table

Number

Name

Function

1

VDD

Output of internal LDO; connect a 0.1 μF decoupling capacitor between this pin and ground.

2

PGND

Power ground for internal DMOS device.

3

OVP

Overvoltage Condition (OVP) sense; connect the ROVP resistor from VOUT to this pin to

adjust the overvoltage protection.

4

SW

The drain of the internal DMOS switch of the boost converter.

5

GATE

Output gate driver pin for external P-channel FET control.

Connect this pin to the negative sense side of the current sense resistor RSC. The threshold

6

VSENSE voltage is measured as VIN – VSENSE . There is also a fixed current sink to allow for trip

threshold adjustment.

7

VIN

Input power to the A8502 as well as the positive input used for current sense resistor.

Indicates a fault condition. Connect a 100 kΩ resistor between this pin and the required logic

8

¯F¯ ¯A ¯¯U ¯¯L¯ ¯T¯

level voltage. The pin is an open drain type configuration that will be pulled low when a fault

occurs.

9

COMP

Output of the error amplifier and compensation node. Connect a series RZ-CZ network from

this pin to ground for control loop compensation.

10

APWM

Analog trimming option for dimming. Applying a digital PWM signal to this pin adjusts the

internal ISET current.

11

PWM/EN

PWM dimming pin, used to control the LED intensity by using pulse width modulation. Also

used to enable the A8502.

Frequency/synchronization pin. A resistor RFSET from this pin to ground sets the switching

12

FSET/SYNC frequency. This pin can also be used to synchronize two or more A8502s in the system. The

maximum synchronization frequency is 2.3 MHz.

13

ISET

Connect the RISET resistor between this pin and ground to set the 100% LED current.

14

AGND

LED signal ground.

15

LED1

Connect the cathode of the LED string to this pin.

16

LED2

Connect the cathode of the LED sring to this pin.

–

PAD

Exposed pad of the package providing enhanced thermal dissipation. This pad must be

connected to the ground plane(s) of the PCB with at least 8 vias, directly in the pad.

Allegro MicroSystems, Inc.

3

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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