7C132-25 데이터 시트보기 (PDF) - Cypress Semiconductor

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7C132-25

2Kx8 Dual-Port Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Busy Timing Diagram No. 3 (Write with BUSY, Slave: CY7C142/CY7C146)

CE

R/W

tWB

BUSY

tPWE

tWH

CY7C132/CY7C136

CY7C142/CY7C146

Interrupt Timing Diagrams[19]

Left Side Sets INTR:

ADDRESS L

CEL

tWC

WRITE 7FF

tINS

tHA

R/WL

INTR

tEINS

tSA

tWINS

Right Side Clears INTR:

ADDRESSR

CER

R/WR

OER

INTR

tHA

tEINR

tRC

READ 7FF

tINR

tOINR

C132-16

C132-17

C132-18

10

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