Nexperia
74LVC594A
8-bit shift register with output register
VI
SHCP input
GND
VI
DS input
GND
VM
t su
th
VM
t su
th
VOH
Q7S output
VM
VOL
mna560
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage drops that occur with the output load.
Figure 9. The data set-up and hold times for the serial data input (DS)
SHR input
STCP input
VM
tsu
VM
Qn outputs
VM
mbc326
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Figure 10. The shift reset (SHR) to storage clock (STCP) set-up times
74LVC594A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 July 2017
© Nexperia B.V. 2017. All rights reserved.
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