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74LV595

8-bit serial-in/serial or parallel-out shift register with output latches (3-State)

Philips Electronics 

Philips Semiconductors

8-bit serial-in/serial or parallel-out shift register

with output latches (3-State)

Product specification

74LV595

AC CHARACTERISTICS (Continued)

GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ

SYMBOL

PARAMETER

WAVEFORM

tW

Shift clock pulse

width HIGH or LOW

Figure 1

CONDITION

VCC(V)

2.0

2.7

3.0 to 3.6

tW

Storage clock pulse

width HIGH or LOW

Figure 2

2.0

2.7

3.0 to 3.6

tW

Master reset pulse

width LOW

Figure 5

2.0

2.7

3.0 to 3.6

1.2

tsu

Set-up time

DS to SHCP

Figure 4

2.0

2.7

3.0 to 3.6

1.2

tsu

Set-up time

SHCP to STCP

Figure 2

2.0

2.7

3.0 to 3.6

1.2

th

Hold time

DS to SHCP

Figure 4

2.0

2.7

3.0 to 3.6

1.2

trem

Removal time

MR to SHCP

Figure 5

2.0

2.7

3.0 to 3.6

Maximum clock

fmax

pulse frequency

SHCP or STCP

Figure 1, 2

2.0

2.7

3.0 to 3.6

NOTES:

1. Unless otherwise stated, all typical values are at Tamb = 25°C.

2. Typical value measured at VCC = 3.3V.

LIMITS

–40 to +85 °C

MIN TYP1 MAX

34

10

–

25

8

–

20

62

–

34

7

–

25

5

–

20

42

–

34

10

–

25

8

–

20

62

–

–

40

–

26

14

–

19

10

–

15

82

–

–

40

–

26

14

–

19

10

–

15

82

–

–

–10

–

5

–4

–

5

–3

–

5

–22

–

–

–35

–

5

–12

–

5

–9

–

5

–72

–

14

40

–

19

58

–

24

702

–

LIMITS

–40 to +125 °C

MIN MAX

41

–

30

–

24

–

41

–

30

–

24

–

41

–

30

–

24

–

–

–

31

–

23

–

18

–

–

–

31

–

23

–

18

–

–

–

5

–

5

–

5

–

–

–

5

–

5

–

5

–

12

–

16

–

20

–

UNIT

ns

ns

ns

ns

ns

ns

ns

MHz

1998 Apr 20

8

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