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74AHC573 Datasheet PDF : 19 Pages
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NXP Semiconductors
74AHC573; 74AHCT573
Octal D-type transparant latch; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min
Max
Min
Max
74AHC573
tpd
propagation Dn to Qn; see Figure 7
[2]
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.5 11.0 1.0
13.0
1.0
14.0 ns
CL = 50 pF
- 7.8 14.5 1.0
16.5
1.0
18.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 3.9 6.8 1.0
8.0
1.0
8.5 ns
CL = 50 pF
- 5.5 8.8 1.0
10.0
1.0
11.0 ns
LE to Qn; see Figure 8
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.8 11.9 1.0
14.0
1.0
15.0 ns
CL = 50 pF
- 8.3 15.4 1.0
17.5
1.0
19.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.2 7.7 1.0
9.0
1.0
10.0 ns
CL = 50 pF
-
5.9 9.7 1.0
11.0
1.0
12.5 ns
ten
enable time OE to Qn; see Figure 9
[3]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 5.8 11.5 1.0
13.5
1.0
14.5 ns
CL = 50 pF
- 8.3 15.0 1.0
17.0
1.0
19.0 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.4 7.7 1.0
9.0
1.0
10.0 ns
CL = 50 pF
-
6.3 9.7 1.0
11.0
1.0
12.5 ns
tdis
disable time OE to Qn; see Figure 9
[4]
VCC = 3.0 V to 3.6 V
CL = 15 pF
- 6.8 11.0 1.0
13.0
1.0
14.0 ns
CL = 50 pF
- 9.7 14.5 1.0
16.5
1.0
18.5 ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
- 4.6 7.7 1.0
9.0
1.0
10.0 ns
CL = 50 pF
-
7.4 9.7 1.0
11.0
1.0
12.5 ns
tW
pulse width LE HIGH; see Figure 8
VCC = 3.0 V to 3.6 V
5.0 -
- 5.0
-
5.0
-
ns
VCC = 4.5 V to 5.5 V
5.0 -
- 5.0
-
5.0
-
ns
tsu
set-up time Dn to LE; see Figure 10
VCC = 3.0 V to 3.6 V
3.5 -
- 3.5
-
3.5
-
ns
VCC = 4.5 V to 5.5 V
3.5 -
- 3.5
-
3.5
-
ns
74AHC_AHCT573
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 25 November 2010
© NXP B.V. 2010. All rights reserved.
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