Philips Semiconductors
74AHC594; 74AHCT594
8-bit shift register with output register
SHCP input
VM
tsu
1/ fmax
STCP input
VM
tW
tPLH
tPHL
Qn outputs
VM
mla512
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 10. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the maximum
storage clock pulse frequency and the shift clock to storage clock set-up time
SHCP input
DS input
VM
t su
th
VM
t su
th
Q7 output
VM
001aae342
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 11. The data set-up time and hold times for DS input to SHCP
74AHC_AHCT594_1
Product data sheet
Rev. 01 — 4 July 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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