Philips Semiconductors
74AHC594; 74AHCT594
8-bit shift register with output register
STR input
STCP input
VM
tW
trec
VM
tPHL
Qn outputs
VM
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 12. The set-up time shift reset (SHR) to storage clock (STCP)
mbc325
SHR input
SHCP input
VM
tW
trec
VM
tPHL
Q7S output
VM
mbc324
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 13. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to
shift clock (SHCP) recovery time
74AHC_AHCT594_1
Product data sheet
Rev. 01 — 4 July 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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