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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

MAX128ACAI 데이터 시트보기 (PDF) - Maxim Integrated

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MAX128ACAI Datasheet PDF : 16 Pages
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Multirange, +5V, 12-Bit DAS with
2-Wire Serial Interface
PIN
DIP
SSOP
1, 2
1, 2
3, 9, 22, 24
4, 7, 8, 11, 22,
24, 25, 28
4
5
6, 8, 10
3
5
6, 10, 12
7
9
11
12
13–20
21
13
14
15–21, 23
26
23
27
NAME
VDD
N.C.
DGND
SCL
A0, A2, A1
SDA
SHDN
AGND
CH0–CH7
REFADJ
REF
Pin Description
FUNCTION
+5V Supply. Bypass with a 0.1µF capacitor to AGND.
No Connect. No internal connection.
Digital Ground
Serial Clock Input
Address Select Inputs
Open-Drain Serial Data I/O. Input data is clocked in on the rising edge of SCL,
and output data is clocked out on the falling edge of SCL. External pull-up
resistor required.
Shutdown Input. When low, device is in full power-down (FULLPD) mode.
Connect high for normal operation.
Analog Ground
Analog Input Channels
Bandgap Voltage-Reference Output/External Adjust Pin. Bypass with a 0.01µF
capacitor to AGND. Connect to VDD when using an external reference at REF.
Reference Buffer Output/ADC Reference Input. In internal reference mode, the
reference buffer provides a 4.096V nominal output, externally adjustable at
REFADJ. In external reference mode, disable the internal reference by pulling
REFADJ to VDD and applying the external reference to REF.
8 _______________________________________________________________________________________

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