P3041 데이터 시트보기 (PDF) - Freescale Semiconductor
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P3041 Datasheet PDF : 160 Pages
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Pin Assignments and Reset States
Table 1. Pins List by Bus (continued)
Signal
Signal Description
LGPL0/LFCLE
LGPL1/LFALE
LGPL2/LOE/LFRE
LGPL3/LFWP
LGPL4/LGTA/LUPWAIT/LPBSE
LGPL5
LCLK0
LCLK1
DMA1_DREQ0/GPIO18
DMA1_DACK0/GPIO19
DMA1_DDONE0
DMA2_DREQ0/GPIO20/ALT_MDVAL
DMA2_DACK0/EVT7/ALT_MDSRCID0
DMA2_DDONE0/EVT8/ALT_MDSRCID1
USB1_UDP
USB1_UDM
USB1_VBUS_CLMP
USB1_UID
UPM general purpose line 0/
LFCLE—FCM
UPM general purpose line 1/
LFALE—FCM
UPM general purpose line 2/
LOE_B—Output Enable
UPM general purpose lIne 3/
LFWP_B—FCM
UPM general purpose line 4/
LGTA_B—FCM
UPM general purpose line 5/Amux
Local Bus Clock
Local Bus Clock
DMA
DMA1 channel 0 request
DMA1 channel 0 acknowledge
DMA1 channel 0 done
DMA2 channel 0 request
DMA2 channel 0 acknowledge
DMA2 channel 0 done
USB Host Port 1
USB1 PHY data plus
USB1 PHY data minus
USB1 PHY VBUS divided signals
USB1 PHY ID detect
USB_CLKIN
USB1_DRVVBUS/GPIO4
USB1_PWRFAULT/GPIO5
USB2_UDP
USB2_UDM
USB2_VBUS_CLMP
USB2_UID
USB PHY clock input
USB1 5V supply enable
USB1 Power fault
USB Host Port 2
USB2 PHY data plus
USB2 PHY data minus
USB2 PHY VBUS divided signals
USB2 PHY ID detect
USB2_DRVVBUS/GPIO6
USB2 5V supply enable
Package Pin
Pin Number Type
B25
O
Power
Supply
BVDD
Notes
3, 4
E25
O
BVDD
3, 4
D25
O
BVDD
3, 4
H26
O
BVDD
3, 4
C25
I/O
BVDD
40
E26
O
BVDD
3, 4
C24
O
BVDD
—
C23
O
BVDD
—
AP21
I
OVDD
26
AL19
O
OVDD
26
AN21
O
OVDD
27
AJ20
I
OVDD
26
AG19
O
OVDD
26
AP20
O
OVDD
26
AT27
AT26
AK25
AK24
AM24
AH21
AJ21
I/O USB_VDD_3P3 —
I/O USB_VDD_3P3 —
I USB_VDD_3P3 38
I USB1_VDD_1P8 —
_DECAP
I
OVDD
—
O
OVDD
—
I
OVDD
—
AP27
AP26
AK26
AK27
AK21
I/O USB_VDD_3P3 —
I/O USB_VDD_3P3 —
I USB_VDD_3P3 38
I USB2_VDD_1P8 —
_DECAP
O
OVDD
—
P3041 QorIQ Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
15
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