74AHC594D 데이터 시트보기 (PDF) - NXP Semiconductors.
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74AHC594D Datasheet PDF : 22 Pages
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NXP Semiconductors
74AHC594; 74AHCT594
8-bit shift register with output register
6.2 Pin description
Table 2.
Symbol
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
SHR
SHCP
STCP
STR
DS
Q0
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
ground (0 V)
serial data output
shift register reset input (active LOW)
shift register clock input
storage register clock input
storage register reset input (active LOW)
serial data input
parallel data output
supply voltage
7. Functional description
Table 3. Function table[1]
Input
SHCP STCP SHR STR DS
X
X
L
X
X
X
X
X
L
X
X
↑
L
H
X
↑
X
H
X
H
X
↑
H
H
X
↑
↑
H
H
X
[1] H = HIGH voltage state;
L = LOW voltage state;
↑ = LOW to HIGH transition;
X = don’t care;
NC = no change;
Output
Q7S Qn
L
NC
NC L
L
L
Q6S NC
NC QnS
Q6S QnS
Function
a LOW-state on SHR only affects the shift register
a LOW-state on STR only affects the storage register
empty shift register loaded into storage register
logic HIGH level shifted into shift register stage 0. Contents of all
shift register stages shifted through, e.g. previous state of stage 6
(internal Q6S) appears on the serial output (Q7S).
contents of shift register stages (internal QnS) are transferred to
the storage register and parallel output stages
contents of shift register shifted through; previous contents of the
shift register is transferred to the storage register and the parallel
output stages
74AHC_AHCT594_2
Product data sheet
Rev. 02 — 9 June 2008
© NXP B.V. 2008. All rights reserved.
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