74AHC594D 데이터 시트보기 (PDF) - NXP Semiconductors.

부품명

상세내역

일치하는 목록

74AHC594D

8-bit shift register with output register

NXP Semiconductors. 

NXP Semiconductors

74AHC594; 74AHCT594

8-bit shift register with output register

Table 7. Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 15.

Symbol Parameter Conditions

25 °C

−40 °C to +85 °C −40 °C to +125 °C Unit

Min Typ[1] Max Min Max

Min

Max

tPHL

HIGH to LOW SHCP to Q7S; see Figure 9

propagation

delay

CL = 15 pF

CL = 50 pF

STCP to Qn; see Figure 10

- 4.1 6.7 1.8

7.6

1.8

8.3 ns

- 5.4 8.8 2.4 10.1

2.4

11.0 ns

CL = 15 pF

CL = 50 pF

SHR to Q7S; see Figure 13

- 3.7 6.1 1.9

6.9

1.9

7.2 ns

- 5.2 8.5 2.6

9.7

2.6

10.5 ns

CL = 15 pF

CL = 50 pF

STR to Qn; see Figure 14

- 4.3 7.0 2.4

8.0

2.4

8.7 ns

- 5.4 8.8 2.7 10.1

2.7

11.0 ns

CL = 15 pF

CL = 50 pF

fmax

maximum

SHCP or STCP;

frequency

see Figure 9 and 10

- 4.5 7.4 2.3

8.4

2.3

9.2 ns

- 5.7 9.4 3.1 10.7

3.1

11.7 ns

90 160 - 80

-

70

- MHz

tW

pulse width SHCP and STCP HIGH or

LOW; see Figure 9 and 10

5.5 -

- 6.0

-

6.5

- ns

SHR and STR HIGH or LOW;

5.2 -

- 5.5

-

6.0

- ns

see Figure 13 and 14

tsu

set-up time DS to SHCP; see Figure 11

3.0 -

- 3.0

-

3.5

- ns

SHR to STCP; see Figure 12

5.0 -

- 5.0

-

5.5

- ns

SHCP to STCP; see Figure 10

5.0 -

- 5.0

-

5.5

- ns

th

hold time

DS to SHCP; see Figure 11

2.0 -

- 2.0

-

2.5

- ns

trec

recovery time SHR to SHCP; see Figure 13

2.9 -

- 3.3

-

3.8

- ns

STR to STCP; see Figure 14

3.4 -

- 3.8

-

4.3

- ns

CPD

power

fi = 1 MHz; VI = GND to VCC [2] -

55 -

-

-

-

- pF

dissipation

capacitance

[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).

[2] CPD is used to determine the dynamic power dissipation (PD in µW).

PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(CL × VCC2 × fo) = sum of the outputs.

74AHC_AHCT594_2

Product data sheet

Rev. 02 — 9 June 2008

© NXP B.V. 2008. All rights reserved.

11 of 22

Share Link: