NJU6682 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6682

160-common x 132-segment DOT MATRIX LCD DRIVER FOR 4 GRAY SCALE

Japan Radio Corporation  

NJU6682

1-9-7)Common Timing Genegation

The common timing is generated by display clock CL ( refer to Fig. )

x 2 frame alternating current drive mode

159 160 1 2 3 4 5 6 7 8

CL

158 159 160 1 2 3 4 5 6 7

FR

Vdd

V1

C0

V4

V5

Vdd

V1

C1

V4

V5

RAM DATA

Vdd

V2

Sn

V3

V5

y n-line inverting drive mode

159 160 1 2 3 4 5 6 7 8

CL

158 159 160 1 2 3 4 5 6 7

FR

Vdd

V1

C0

V4

V5

Vdd

V1

C1

V4

V5

RAM DATA

Vdd

V2

Sn

V3

V5

Fig.2 Waveform of Display Timing

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