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MC74HCT541A
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MC74HCT541A Datasheet PDF : 8 Pages
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MC74HCT541A
Octal 3-State Non-Inverting
Buffer/Line Driver/
Line Receiver With
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
http://onsemi.com
The MC74HCT541A is identical in pinout to the LS541. This
device may be used as a level converter for interfacing TTL or NMOS
outputs to high speed CMOS inputs.
The HCT541A is an octal non–inverting buffer/line driver/line
receiver designed to be used with 3–state memory address drivers,
clock drivers, and other bus–oriented systems. This device features
inputs and outputs on opposite sides of the package and two ANDed
active–low output enables.
• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5V
• Low Input Current: 1µA
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 134 FETs or 33.5 Equivalent Gates
2
A1
3
A2
LOGIC DIAGRAM
18
Y1
17
Y2
20
1
20
1
PDIP–20
N SUFFIX
CASE 738
MARKING
DIAGRAMS
20
MC74HCT541AN
AWLYYWW
SOIC WIDE–20
DW SUFFIX
CASE 751D
1
20
HCT541A
AWLYYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package Shipping
MC74HCT541AN
PDIP–20 1440 / Box
MC74HCT541ADW SOIC–WIDE 38 / Rail
MC74HCT541ADWR2 SOIC–WIDE 1000 / Reel
4
A3
Data
Inputs
5
A4
6
A5
7
A6
8
A7
9
A8
1
Output OE1
Enables OE2
19
16
Y3
15
Y4
14
Y5
Non–Inverting
Outputs
13
Y6
12
Y7
FUNCTION TABLE
Inputs
OE1 OE2 A
Output Y
L
L
L
L
L
L
H
H
HXX
Z
XHX
Z
Z = High Impedance
X = Don’t Care
11
Y8
Pinout: 20–Lead Packages (Top View)
VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
PIN 20 = VCC
PIN 10 = GND
20 19 18 17 16 15 14 13 12 11
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 2
1 2 3 4 5 6 7 8 9 10
OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND
1
Publication Order Number:
MC74HCT541A/D
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