MAX7651 데이터 시트보기 (PDF) - Maxim Integrated
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MAX7651 Datasheet PDF : 36 Pages
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Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
TIMING CHARACTERISTICS
(MAX7651: AVDD = VPWMV = DVDD = VREF+ = +4.5 to +5.5V, VREF- = 0, fXTAL = 12MHz. MAX7652: AVDD = VPWMV = DVDD =
+2.7V to +3.6V, VREF+ = +2.5V, VREF- = 0, ACOM = AVDD/2, fXTAL = 12MHz. TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25°C.) (Figure 3)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
RST Pulse Width (High)
EXTERNAL CLOCK
Clock Frequency
fCK
Clock Period
tCLCL
Clock High Time
tCHCX
Clock Low Time
tCLCX
Clock Rise Time
tCLCH Guaranteed by design
Clock Fall Time
tCHCL Guaranteed by design
INSTRUCTION TIMING CHARACTERISTICS
100 +
(64 x tCK)
83
25
25
µs
12 MHz
ns
ns
ns
10
ns
10
ns
ALE Pulse Width
tLHLL
1.5tCLCL -
20
ns
Address Valid to ALE Low
tAVLL
0.5tCLCL -
15
ns
Address Hold after ALE
Low
tLLAX
0.5tCLCL -
ns
20
ALE Low to Valid
Instruction In
ALE Low to PSEN Low
tLLIV
tLLPL
0.5tCLCL
- 10
2.5tCLC ns
L - 35
ns
PSEN Pulse Width
tPLPH
2tCLCL
ns
- 15
PSEN Low to Valid
Instruction In
tPLIV
2tCLCL - ns
35
Input Instruction Hold
after PSEN
tPXIX
0
ns
Input Instruction Float
after PSEN
tPXIZ
tCLCL -
ns
15
Address to Valid Instruction
In
PSEN Low to Address Float
tAVIV
tPLAZ
3tCLCL - ns
50
10
ns
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