MAX7651 데이터 시트보기 (PDF) - Maxim Integrated
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MAX7651 Datasheet PDF : 36 Pages
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Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
P1.0–P1.7
92.0–P2.4
P2.5 LOWER = L
UPPER = H
PORT 0
ALE/~PROG
EA/Vpp
P2.7
(READ CYCLE)
P3.4
(READY/~BSY)
PROGRAMMING ADDRESS
DATA IN
tPROGL
tADSUW 3tCK (min)
(LOGIC “1”)
tWRITE
VERIFICATION ADDRESS
DATA OUT
tADSUR
tREAD
tP27H
3tCK (min)
tP27L
10tCK (min)
Figure 2. FLASH External Programming and Verification Waveforms
ALE
PSEN
PORT 0
tLHLL
tLLIV
tAVLL
tPLPH
tPLIV
tLLPL
tPLAZ
tLLAX
ADDRESS
A0–A7
tAVIV
tPXIZ
tPXIX
INSTRUCTION
IN
ADDRESS
A0–A7
PORT 2
ADDRESS A8–A15 OUT
ADDRESS A8–A15 OUT
Figure 3a. External Program Memory Read Cycle
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