IS61LF25636A-7.5TQLI(2005) 데이터 시트보기 (PDF) - Integrated Silicon Solution
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IS61LF25636A-7.5TQLI
(Rev.:2005)
(Rev.:2005)
Integrated Silicon Solution
IS61LF25636A-7.5TQLI Datasheet PDF : 32 Pages
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IS61LF25636A IS61LF51218A IS61VF25636A IS61VF51218A
ISSI ®
165 PBGA PACKAGE PIN CONFIGURATION
256K X 36 (TOP VIEW)
1
2
A NC
A
B NC
A
3
4
5
6
7
8
9
10
11
CE
BWc
BWb CE2
BWE ADSC ADV
A
NC
CE2
BWd
BWa CLK
GW
OE
ADSP A
NC
C DQPc NC
VDDQ
Vss
Vss
Vss
Vss
Vss
VDDQ
NC
DQPb
D DQc
DQc
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQb
DQb
E DQc
DQc
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQb
DQb
F DQc
DQc
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQb
DQb
G DQc
DQc
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQb
DQb
H NC
Vss
NC
VDD
Vss
Vss
Vss
VDD
NC
NC
ZZ
J DQd
DQd
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQa
DQa
K DQd
DQd
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQa
DQa
L DQd
DQd
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQa
DQa
M DQd
DQd
VDDQ
VDD
Vss
Vss
Vss
VDD
VDDQ
DQa
DQa
N DQPd NC
VDDQ
Vss
NC
NC
NC
Vss
VDDQ
NC
DQPa
P NC
NC
A
A
TDI
A1*
TDO A
A
A
A
R MODE NC
A
A
TMS A0*
TCK A
A
A
A
Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
PIN DESCRIPTIONS
Symbol
A
Pin Name
Address Inputs
A0, A1
ADV
ADSP
ADSC
GW
Synchronous Burst Address Inputs
Synchronous Burst Address
Advance
Address Status Processor
Address Status Controller
Global Write Enable
CLK
CE, CE2, CE2
BWx (x=a,b,c,d)
Synchronous Clock
Synchronous Chip Select
Synchronous Byte Write
Controls
Symbol
BWE
OE
ZZ
MODE
TCK, TDO
TMS, TDI
NC
DQx
DQPx
VDD
VDDQ
Vss
Pin Name
Byte Write Enable
Output Enable
Power Sleep Mode
Burst Sequence Selection
JTAG Pins
No Connect
Data Inputs/Outputs
Data Inputs/Outputs
3.3V/2.5V Power Supply
Isolated Output Power Supply
3.3V/2.5V
Ground
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
05/04/05
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