IS61LF25636A-7.5TQLI(2005) 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS61LF25636A-7.5TQLI
(Rev.:2005)

256K x 36, 512K x 18 9 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

Integrated Silicon Solution 

IS61LF25636A IS61LF51218A IS61VF25636A IS61VF51218A

ISSI ®

119 BGA PACKAGE PIN CONFIGURATION-256K X 36 (TOP VIEW)

1

2

3

4

5

6

7

A

VDDQ

B

NC

A

CE2

A

ADSP

A

A

ADSC

A

A

VDDQ

A

NC

C

NC

A

A

VDD

A

A

NC

D

DQc

DQPc

Vss

NC

Vss

DQPb

DQb

E

DQc

DQc

Vss

CE

Vss

DQb

DQb

F

VDDQ

G

DQc

H

DQc

DQc

DQc

DQc

Vss

BWc

Vss

OE

ADV

GW

Vss

BWb

Vss

DQb

DQb

DQb

VDDQ

DQb

DQb

J

VDDQ

VDD

NC

VDD

NC

VDD

VDDQ

K

DQd

DQd

Vss

CLK

Vss

DQa

DQa

L

DQd

DQd

BWd

NC

BWa

DQa

DQa

M

VDDQ

DQd

Vss

BWE

Vss

DQa

VDDQ

N

DQd

DQd

Vss

A1*

Vss

DQa

DQa

P

DQd

DQPd

Vss

A0*

Vss

DQPa

DQa

R

NC

A

MODE

VDD

NC

A

NC

T

NC

NC

A

A

A

NC

ZZ

U

VDDQ

TMS

TDI

TCK

TDO

NC

VDDQ

Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

PIN DESCRIPTIONS

Symbol

Pin Name

A

Address Inputs

A0, A1

ADV

ADSP

Synchronous Burst Address Inputs

Synchronous Burst Address

Advance

Address Status Processor

ADSC

GW

Address Status Controller

Global Write Enable

CLK

CE, CE2

Synchronous Clock

Synchronous Chip Select

BWx (x=a-d) Synchronous Byte Write Controls

BWE

Byte Write Enable

Symbol

OE

ZZ

MODE

TCK, TDO

TMS, TDI

NC

DQa-DQd

DQPa-Pd

VDD

VDDQ

Vss

Pin Name

Output Enable

Power Sleep Mode

Burst Sequence Selection

JTAG Pins

No Connect

Data Inputs/Outputs

Output Power Supply

Power Supply

Output Power Supply

Ground

4

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

05/04/05

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