AS8S128K32P-15/883C 데이터 시트보기 (PDF) - Austin Semiconductor

부품명

상세내역

일치하는 목록

AS8S128K32P-15/883C

128K x 32 SRAM SRAM MEMORY ARRAY

Austin Semiconductor 

Austin Semiconductor, Inc.

SRAM

AS8S128K32

CAPACITANCE TABLE (VIN = 0V, f = 1 MHz, TA = 25oC)

SYMBOL

PARAMETER

MAX

UNITS

CADD

A0 - A18 Capacitance

40

pF

COE

OE\ Capacitance

40

pF

CWE, CCE

WE\ and CE\ Capacitance

20

pF

CIO

I/O 0- I/O 31 Capacitance

20

pF

NOTES

4

4

4

4

TRUTH TABLE

MODE

OE\

CE\

WE\

I/O

POWER

Read

L

L

H

Q

ACTIVE

Write

X

L

L

D

ACTIVE

Standby

X

H

X

HIGH Z

STANDBY

Not Selected

H

L

H

HIGH Z

ACTIVE

AC TEST CONDITIONS

Current Source

Device

-

Under

Test

+

Ceff = 50pf

Current Source

I

OL

+

IOH

Figure 1

TEST SPECIFICATIONS

Input pulse levels........................................VSS to 3V

Input rise and fall times..........................................5ns

Input timing reference levels.................................1.5V

Output reference levels........................................1.5V

Output load.............................................See Figures 1

Vz = 1.5V

(Bipolar

Supply)

NOTES:

Vz is programable from -2V to + 7V.

IOL and IOH programmable from 0 to 16 mA.

Vz is typically the midpoint of VOH and VOL.

I and I are adjusted to simulate a typical resistive load

OL

OH

circuit.

AS8S128K32

Rev. 4.0 5/03

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

3

Share Link: