PBL38772/1SOA 데이터 시트보기 (PDF) - Ericsson

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PBL38772/1SOA

Subscriber Line Interface Circuit (SLIC)

Ericsson  

PBL 387 72/1

Subscriber Line

Interface Circuit (SLIC)

Key Features

• On-chip ringing generation

- Balanced, up to 81 VPeak

- Any waveform

- 5REN ringing load

- Automatic gain control of ring signal (AGC-R)

- Short circuit safe

• Low on-hook power consumption in Active

State (65 mW @ VBat = -80 V)

• Automatic current controlled battery

switching between on-hook battery (VBat) and

talk battery (VTBat)

• Pulse metering and on-hook transmission

• UL-1950 and MTU compliant on-hook line

voltage

• 3.3 V compatible logic interface

• Silent or fast polarity reversal

• Programmable Ring-Trip current

VTBA T

VBAT

BGND

TIPX

HP

RINGX

Two-wire

Interface

VTB

Ring Trip

Detector

Line Feed

Controller

and

Longitudinal

Signal

Suppression

Off-hook

Detector

VF Signal

Transmission

Ringing

Control

Input

Decoder and

Control

VCC

AGND

PRT

C1

C2

C3

DET

PLC

LP

REF

SPR

PLD

VTX

RSN

CRING

VR

Figure 1. Block diagram.

Description

The ringing FlexiSLIC™ PBL 387 72/1 Subscriber Line

Interface Circuit (SLIC) is a 90 V bipolar integrated cir-

cuit for use in short loop applications. The PBL 387 72/1

SLIC has been optimized for low power consumption,

low total line interface cost and for a high degree of

flexibility in various applications.

The PBL 387 72/1 SLIC supplies a balanced, sinewave

or trapezoidal ringing signal of up to 81 VPeak (85 V

DC supply) to the subscriber line across a load of up

to 5REN. The PBL 387 72/1 supplies programmable

constant current to the subscriber loop, sourced from

the talk battery. The On-Hook line voltage of 43 V to

56 V is derived from the battery. All battery switching

is internal to the device and is automatic. To further

reduce power consumption the automatic gain control

for the ring signal (AGC-R) keeps the level always

adjusted to the maximum, that can be sourced from the

available battery.

The SLIC incorporates loop current, ground key and

ring-trip detection functions. The PBL 387 72/1 is

compatible with loop start and ground start signal-

ling. Two- to four-wire and four- to two-wire voice

frequency (vf) signal conversion is accomplished by

the SLIC in conjunction with a standard codec. The

line terminating impedance and balance impedance

is programmable and may be complex or real for

worldwide compliance.

Longitudinal balance specifications and other device

characteristics are in compliance with Telcordia (Bell-

core) and ITU-T requirements.

Tip and ring voltages are UL-1950 compliant;

i.e. no two-wire line voltage exceeds 56 V. The

PBL 387 72/1 SLIC is packaged in a surface mount

28-pin SOIC package.

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