CS22230 데이터 시트보기 (PDF) - Cirrus Logic
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CS22230 Datasheet PDF : 29 Pages
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PLLAGND
PLLAVCC
PLLDGND
PLLDVCC
PLLPLUS
Analog PLL ground.
Analog PLL power. 3.3V input.
Digital PLL ground.
Digital PLL power. 1.8V input.
Analog PLL ground.
Input
Input
Input
Input
Input
Mini PCI Interface
The Mini PCI interface is a standard 2.2 compliant interface. There are a total of 52 signals.
AD[31:0]
Bi-directional
Mini PCI Address/Data. This bus contains a physical address during the
first clock of a Mini PCI transfer and data during subsequent clocks. The
signals are inputs during the address and write data phases of a
transaction, or outputs during the read data phase of a transaction.
nCBE[3:0]
Bi-directional
Control/Byte Enable. This bus defines the bus command during the first
clock of a Mini PCI transaction and the data byte enables during
subsequent clocks.
IDSEL
I/O OD
Mini PCI Initialization device select. Used as a chip select during
configuration read and write cycles.
nFRAME
Bi-directional
Mini PCI cycle frame. This signal marks the beginning and duration of a
current bus cycle.
nIRDY
Bi-directional
Mini PCI Initiator ready. IRDY holds off the beginning of a write cycle and
the completion of a read cycle until sampled active.
nTRDY
Bi-directional
Mini PCI Target ready. This signal is driven active to indicate that write
data has been sampled or that read data has been delivered.
nDEVSEL
Bi-directional
Mini PCI Device select. As a medium speed device, this signal is driven
active two Mini PCI clocks after NFRAME is sampled active indicating a
positive decode. It remains active until the end of the transaction.
CS22230 Mini PCI / USB Wireless Controller
14 of 29
www.cirrus.com
DS558PP1 Rev. 1.0
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