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T7264 데이터 시트보기 (PDF) - Agere -> LSI Corporation

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T7264
Agere
Agere -> LSI Corporation Agere
T7264 Datasheet PDF : 54 Pages
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Data Sheet
April 1998
T7264 U-Interface 2B1Q Transceiver
K2 Interface Description (continued)
Table 9. UM2 and UM3 Octet—UCS Bits (Overview)
Octet
UM2
UM2
UM3
UM3
Octet #
6
6
7
7
DO/DI
DOLT/[DINT]
DONT/[DILT]
DOLT/[DINT]
DONT/[DILT]
Bit 1 Bit 2 Bit 3 Bit 4
See previous page.
See previous page.
R2, 5 [r]febe ps2
ntm
R2, 5 [r]febe R3, 4
R4, 4
Bit 5
act
act
cso
R5, 4
Bit 6
R1, 5
R1, 5
R6, 4
R6, 4
Bit 7
R1, 6
R1, 6
sai
uoa
Bit 8
ps1
[a]dea
nib
aib
Table 10. UM2 and UM3 Octet—UCS Bits (Functions)
Octet
UM2
UM2
UM2
UM2
UM3
UM3
UM3
UM3
Bit #
5
6, 7
8
8
1, 6
2
3
4
Symbol
act
Rx, y
ps1
(DOLT/
DINT)
[a]dea
(DONT/
DILT)
Rx, y
[r]febe
ps2
(DOLT/
DINT)
ntm
(DOLT/
DINT)
Name/Function
Activation. Passed transparently from the K2 to the U-interface and from the U to the
K2 except during a start-up when it is forced to a 0 on the K2.
0—Pending activation.
1—Ready to transmit information.
Reserved Bits. Passed transparently from the K2 to the U-interface and from the U
to the K2. Transmit should always be set to a 1.
Power Status #1. Passed transparently from the K2 to the U-interface at the NT and
from the U to the K2 at the LT.
0—Primary power out.
1—Primary power is normal.
When both ps1 and ps2 are 0, this indicates a dying gasp.
[AND with] Deactivate. In LT mode, this bit is used in conjunction with the ldea bit
from the K2, then passed to the U-interface as the transmitted dea bit. In NT mode,
this bit is passed transparently from the U to the K2 interface. Allows deactivation
warning to the far-end NT without deactivating the local transceiver.
0—Deactivation warning.
1—Normal.
Reserved Bits. Passed transparently from the K2 to the U-interface and from the U
to the K2 interface. Transmit should always be set to a 1.
[Receive] Far-End Block Error. If the MODE1 = 1, rfebe is ANDed with nebe and the
result is sent out as the U-interface febe bit. If the MODE1 = 0, rfebe is passed trans-
parently from the K2 (DOLT/DINT) to the U-interface febe bit. For either setting of
MODE1, the febe bit is passed transparently from the U-interface to the K2 interface.
0—Error indication passed to the originator.
1—No error, or feature is not utilized.
Power Status #2. Passed transparently from the K2 to the U-interface at the NT and
from the U to the K2 at the LT.
0—Secondary power out.
1—Secondary power normal.
When both ps1 and ps2 are 0, this indicates a dying gasp.
NT Test Mode. Passed transparently from the K2 to the U-interface at the NT and
from the U to the K2 at the LT.
0—The NT is currently in a test mode.
1—Normal.
Lucent Technologies Inc.
17

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