M37702M2BXXXFP 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC

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M37702M2BXXXFP

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

MITSUBISHI MICROCOMPUTERS

M37702M2AXXXFP, M37702M2BXXXFP

M37702S1AFP, M37702S1BFP

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

BASIC FUNCTION BLOCKS

The M37702M2AXXXFP contains the following devices on a

single chip: ROM and RAM for storing instructions and data, CPU

for processing, bus interface unit (which controls instruction

prefetch and data read/write between CPU and memory), timers,

UART, A-D converter, and other peripheral devices such as I/O

ports. Each of these devices are described below.

MEMORY

The memory map is shown in Figure 1. The address space is 16

M bytes from addresses 016 to FFFFFF16. The address space is

divided into 64 K bytes units called banks. The banks are num-

bered from 016 to FF16.

Built-in ROM, RAM and control registers for built-in peripheral de-

vices are assigned to bank 016.

The 16 K bytes area from addresses C00016 to FFFF16 is the

built-in ROM. Addresses FFD616 to FFFF16 are the RESET and

interrupt vector addresses and contain the interrupt vectors. Refer

to the section on interrupts for details.

The 512 bytes area from addresses 8016 to 27F16 contains the

built-in RAM. In addition to storing data, the RAM is used as stack

during a subroutine call, or interrupts.

Assigned to addresses 016 to 7F16 are peripheral devices such as

I/O ports, A-D converter, UART, timer, and interrupt control regis-

ters.

A 256 bytes direct page area can be allocated anywhere in bank

016 using the direct page register DPR. In direct page addressing

mode, the memory in the direct page area can be accessed with

two words thus reducing program steps.

Bank 016

Bank 116

00000016

00FFFF16

01000016

01FFFF16

Bank FE16

FE000016

Bank FF16

FEFFFF16

FF000016

FFFFFF16

Fig. 1 Memory map

00000016

00007F16

00008016

Internal RAM

512 bytes

00027F16

00C00016

Internal ROM

16K bytes

00FFD616

00FFFF16

00000016

Peripheral devices

control registers

see Fig. 2 for

further information

00007F16

Interrupt vector table

00FFD616

A-D conversion

UART1 transmission

UART1 receive

UART0 transmission

UART0 receive

Timer B2

Timer B1

Timer B0

Timer A4

Timer A3

Timer A2

Timer A1

Timer A0

INT2

INT1

INT0

Watchdog timer

DBC

BRK instruction

00FFFE16

Zero divide

RESET

5

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