M37702M2BXXXFP 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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M37702M2BXXXFP Datasheet PDF : 59 Pages
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MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
The bus interface unit operates using one of the waveforms (1) to
(6) shown in Figure 5. The standard waveforms are (1) and (2).
The ALE signal is used to latch only the address signal from the
multiplexed signal containing data and address.
_
The E signal becomes “L” when the bus interface unit reads an in-
struction code or data from memory or when it writes data to
__
memory. Whether to perform read or write is controlled by the R/W
__
signal. Read is performed when the R/W signal is “H” state and
write is performed when it is “L” state.
Waveform (1) in Figure 5 is used to access a single byte or two
bytes simultaneously. To read or write two bytes simultaneously,
the first address accessed must be even. Furthermore, when ac-
cessing an external memory area in memory expansion mode or
microprocessor mode, set the bus width selection input pin BYTE
to “L”. (external data bus width to 16 bits) The internal memory
area is always treated as 16-bit bus width regardless of BYTE.
When performing 16-bit data read or write, if the conditions for si-
multaneously accessing two bytes are not satisfied, waveform (2)
is used to access each byte one by one.
However, when prefetching the instruction code, if the address of
the instruction code is odd, waveform (1) is used, and only one
byte is read in the instruction queue buffer.
____
The signals A0 and BHE in Figure 5 are used to control these
cases: 1-byte read from even address, 1-byte read from odd ad-
dress, 2-byte simultaneous read from even and odd addresses,
1-byte write to even address, 1-byte write to odd address, or 2-
byte simultaneous write to even and odd addresses. The A0 signal
that is the address bit 0 is “L” when an even number address is
____
accessed. The BHE signal becomes “L” when an odd number ad-
dress is accessed.
The bit 2 of processor mode register (address 5E16) is the wait bit.
_
When this bit is set to “0”, the “L” width of E signal is 2 times as
long when accessing an external memory area in memory expan-
_
sion mode or microprocessor mode. However, the “L” width of E
signal is not extended when an internal memory area is accessed.
_
When the wait bit is “1”, the “L” width of E signal is not extended
_
for any access. Waveform (3) is an expansion of the “L” width of E
signal in waveform (1). Waveform (4), (5), and (6) are expansion
_
of each “L” width of E signal in waveform (2), first half of waveform
(2), and the last half of waveform (2) respectively.
Instruction code read, data read, and data write are described be-
low.
Internal clock φ
Port P2
(1)
E
ALE
AD
Port P2
(2)
E
ALE
A D A +1 D
Port P2
(3)
E
ALE
A
D
Port P2
(4)
E
ALE
A
D
A +1
D
Port P2
(5)
E
ALE
A
D A +1 D
Port P2
(6)
E
ALE
A D A +1 D
A : Address
D : Data
These waveforms are at the memory expansion mode and
the microprocessor mode.
Access
method
Access 2-byte
Access even
Access odd
Signal simultaneously address 1-byte address 1-byte
A0
“L”
“L”
“H”
BHE
“L”
“H”
“L”
Fig. 5
Relationship
____
between
access
method
and
signals
A0
and BHE
10
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