NCP1205
MAXIMUM RATINGS
Pin No.
Value
Rating
PDIP−8 PDIP−14 SOIC−16 Symbol
Min
Max
Unit
Power Supply Voltage
8
Thermal Resistance Junction−to−Air PDIP−8
−
PDIP−14
−
SOIC−16
−
13
14
Vin
−
−
−
RqJA
−
−
−
−
−
−
30
V
100
°C/W
100
145
Operating Junction Temperature Range
Maximum Junction Temperature
Storage Temperature Range
ESD Capability, HBM Model
−
−
−
All Pins
−
−
−
All Pins
−
−
−
All Pins
TJ
TJmax
Tstg
−
−
−25 to +125 °C
−
150
°C
−
−60 to +150 °C
−
2.0
kV
ESD Capability, Machine Model
All Pins All Pins All Pins
−
−
200
V
Demagnetization Pin Current
2
3
4
−
−
−5.0/+10
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (For typical values TA = 25°C, for min/max values TJ = −25°C to +125°C, Max TJ = 150°C,
VCC = 12 V unless otherwise noted.)
Pin No.
Characteristics
PDIP−8 PDIP−14 SOIC−16 Symbol Min Typ Max Unit
Demagnetization Block
Input Threshold Voltage (Vpin2 increasing)
Hysteresis (Vpin2 decreasing)
Input Clamp Voltage
High State (Ipin2 = 3.0 mA)
Low State (Ipin2 = −3.0 mA)
Demag Propagation Delay
2
3
2
3
2
3
−
−
No Demag Signal Activation
−
−
Internal Input Capacitance at 1.0 V
2
3
Demag Propagation Delay with 22 kW External Resistor
2
3
4
Vth
50
65
85 mV
4
VH
−
30
−
mV
4
V
VCH
VCL
8.0
10
12
−0.9 −0.7 −0.5
−
−
100 300 350 ns
−
−
−
4.0 8.0 ms
4
Cpin2
−
10
−
pF
4
−
100 370 480 ns
Feedback Path
Input Impedance at VFB = 3.0 V
Internal Error Amplifier Closed Loop Gain
3
4
3
4
Internal Built−In Offset Voltage for Error Detection
−
−
Error Amplifier Level of VCO Take Over
−
−
Internal Divider from Internal Error Amp, Pin to Current
−
−
Setpoint
5
Zin
−
50
−
kW
5
AVCL
− −3.0 −
−
−
Vref
2.2 2.5 2.8
V
−
−
−
1.0
−
V
−
−
−
3.0
−
−
Fault Detection Circuitry
Internal Over Current Level
−
−
Fault Time Duration to Latch Activation @ Ct = 1.0 ηF
−
−
Over Current Latchoff Phase @ Ct = 1.0 ηF
−
−
Hysteresis when VFB goes back into Regulation
Overvoltage Protection Threshold for PDIP−14 and
SOIC−16 versions
−
−
6
−
−
WLL
−
1.5
−
V
−
−
−
128
−
ms
−
−
−
1.0
−
s
−
−
−
100
−
mV
7
OVP1 2.5 2.8 3.1
V
Current Sense Comparator
Input Bias Current @ 1.0 V
Maximum Current Setpoint
Minimum Current Setpoint
6
11
12
IIB
− 0.02 −
mA
6
11
12
Vcl
0.9 1.0 1.1
V
6
11
12
Vmin
225 250 285 mV
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