PSD412A2 데이터 시트보기 (PDF) - STMicroelectronics
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PSD412A2 Datasheet PDF : 123 Pages
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CONTROL
RD, WR
PROG.
BUS
INTRF
AD0 – AD15
ADIO
PORT
PC0 – PC7
PROG.
PORT
PORT
C
PD0 – PD7
PROG.
PORT
PORT
D
CLKIN
ADDRESS/DATA/CONTROL BUS
ZPLD
INPUT
BUS
PAGE
REG.
DECODE PLD
(DPLD)
(NOTE 1)
EPROM
SELECTS
SRAM
SELECT
PERIPHERAL
SELECTS
CSIOP
256K –1M BIT
EPROM
16 K BITS
SRAM
I/O
DECODER
(NOTE 1)
CLKIN
GENERAL PLD
(GPLD)
27PT
80PT
11PT
24 MACROCELLS
PORT A MACROCELLS
PORT B MACROCELLS
PORT E MACROCELLS
(NOTE 2)
MACROCELL FEEDBACK OR PORT INPUT
CLKIN
NOTES: 1. ZPLD INPUT BUS
– A1 = 36 + CLOCK = 37 INPUTS
– A2 = 58 + CLOCK = 59 INPUTS
2. PORT E MACROCELLS AVAILABLE ON A2 VERSIONS ONLY.
POWER
MANAGER
UNIT
VSTDBY
PROG.
PORT PA0 – PA7
PORT
A
PROG.
PORT PB0 – PB7
PORT
B
PROG.
PORT PE0 – PE7
PORT
E
GLOBAL
CONFIG.
&
SECURITY
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